这是一个创建于 5385 天前的主题，其中的信息可能已经有所发展或是发生改变。
According to http://www.cs.cornell.edu/projects/ladis2009/talks/dean-keynote-ladis2009.pdf
L1 cache reference: 0.5 ns
Branch mispredict: 5 ns
L2 cache reference: 7 ns
Mutex lock/unlock: 100 ns
Main memory reference: 100 ns
Compress 1K bytes with Zippy: 10,000 ns
Send 2K bytes over 1 Gbps network: 20,000 ns
Read 1 MB sequentially from memory: 250,000 ns
Round trip within same datacenter: 500,000 ns
Disk seek: 10,000,000 ns
Read 1 MB sequentially from network: 10,000,000 ns
Read 1 MB sequentially from disk: 30,000,000 ns
Send packet CA->Netherlands->CA: 150,000,000 ns
L1 cache reference: 0.5 ns
Branch mispredict: 5 ns
L2 cache reference: 7 ns
Mutex lock/unlock: 100 ns
Main memory reference: 100 ns
Compress 1K bytes with Zippy: 10,000 ns
Send 2K bytes over 1 Gbps network: 20,000 ns
Read 1 MB sequentially from memory: 250,000 ns
Round trip within same datacenter: 500,000 ns
Disk seek: 10,000,000 ns
Read 1 MB sequentially from network: 10,000,000 ns
Read 1 MB sequentially from disk: 30,000,000 ns
Send packet CA->Netherlands->CA: 150,000,000 ns
7 条回复 1970-01-01 08:00:00 +08:00
 | 1 willwen 2011-04-04 09:58:54 +08:00 这可以用超频调。。取决于性能。。 |
 | 2 Oliver 2011-04-04 10:59:11 +08:00 L1 Cache 的速度好快啊。寄存器的速度是否会更快，或者和 L1 Cache 持平？ |
 | 3 stranbird 2011-04-04 11:22:15 +08:00 寄存是硬件实现 显然很快啊。 L1就是用寄存器们来实现的。 |
 | 6 dogFish 2011-04-04 11:49:13 +08:00 错了, 是减少命中失败次数 |
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